A Feed circuit component definition is an active component that allows users to specify a voltage or current source. It consists of RLC components and an input waveform that modifies the electric field on its cell edge.


Double-clicking on a circuit component definition in the Definitions branch of the Project Tree opens the Circuit Component Definition Editor, where a feed is created by choosing Feed from the Type drop-down menu. The top group of controls define the layout of the RLC components with the source.

Specifying a two port matching circuit enables a Matching Circuit Arrangement option that allows users to decide whether the network is in series with or parallel to the source resistor. Additionally, the source inductor and capacitor must be zero when a matching network is specified.

The bottom group of controls defines the waveform and how it is applied to the simulation space.

Users should note that either Phase Shift or Time Delay will be applied depending on whether or not the waveform is a sinusoid.

Rated Voltage & Current settings apply to electrostatic discharge (ESD) analysis. Both Rated Voltage and Rated Current default to infinity, but users can change either value by unchecking the associated box and entering the desired value or expression. These settings do not affect energy propagation through the component, but XF checks the voltage and current at each timestep during a simulation to see if they exceed the rated values. Users can adjust these settings to flag components that are likely to experience damage or failure during a simulation.

Pi Matching Network Example

Consider a Pi matching network for a simple antenna. Rather than creating three circuit components and laying them out in XF's geometry window, the matching network can be defined in the feed definition using a netlist component by following these steps:

  1. Determine the schematic layout and component values of the matching network.
  2. Define the matching network in XF as a netlist component.
  3. Select the netlist component in the feed definition editor.
  4. Place the matched feed on a single cell edge in the finite-difference time-domain (FDTD) simulation space as a Circuit Component.

This matching network has three external ports that plug into the feed. Simulated results are defined in the following ways: