The Netlist Component definition allows passive SPICE3 circuits to be considered a circuit component definition within the finite-difference time-domain (FDTD) simulation. This co-simulation allows the netlist circuit to be treated as one cell edge, regardless of the actual size and complexity of the circuit being described by the netlist. This allows users to simulate complex circuits without creating the circuit layout piece-by-piece in XF.

Diodes should be included in the netlist component when only time-domain results are of interest. This is because diodes violate the assumptions of linear system theory, making it incorrect to apply either a Fourier or discrete Fourier transform to the time-domain results. A simulation containing a diode produces invalid frequency-domain results—including impedances, S-parameters, and steady-state far-zone fields—even if the time-domain results eventually decay to zero. The time-domain results are unaffected, and therefore are valid.

Additionally, netlist components may be used to define a matching circuit embedded within a feed. The netlist must first be imported, creating a netlist component definition that can then be assigned as a matching circuit in the feed editor.


A netlist component is created by choosing Netlist Component from the Type drop-down menu in the Circuit Component Definition Editor. A netlist file is imported using the Import Netlist button. Once imported, the file's contents can be edited using the View/Edit Netlist button.

Netlist files will contain one or more subcircuits. Because the netlist component represents only one subcircuit during the FDTD simulation, the Subcircuit drop-down menu specifies which to use.

Positive Terminal (+) and Negative Terminal (-) indicate how the external nodes of the .SUBCKT are associated with the endpoints of the circuit component. This assists users when orienting diode elements in the 3-D CAD space.

Rated Voltage & Current settings apply to electrostatic discharge (ESD) analysis. Both Rated Voltage and Rated Current default to infinity, but users can change either value by unchecking the associated box and entering the desired value or expression. These settings do not affect energy propagation through the component, but XF checks the voltage and current at each timestep during a simulation to see if they exceed the rated values. Users can adjust these settings to flag components that are likely to experience damage or failure during a simulation.

Supported Elements and Models

XF supports a subset of the circuit elements and element models available in SPICE, but supports none of the SPICE analysis or output commands.

The following circuit elements are supported:

The import process will fail if unsupported circuit elements are encountered anywhere in the netlist file. Analysis commands (.AC, .DISTO, .NOISE, etc.) and output commands (.SAVE, .PLOT, .PRINT, .FOUR) contained in a netlist file are ignored during the import process and excluded from the imported data. It follows that XF supports only .MODEL definitions corresponding to currently supported element types.

After a netlist file is imported, only valid subcircuit definitions from the netlist may be used as the netlist component definition. If the netlist file contains more than one valid subcircuit, the desired subcircuit may be selected from the drop-down menu in the editor.

The following rules define a valid .SUBCKT definition:

Conventions and Syntax

Detailed information about how SPICE3 netlists are structured and written can be found at the University of California at Berkeley's EECS Department.

There are a few key differences between the official SPICE3 conventions and syntax and what XF supports for imported netlist files:

0.20 pF Ceramic Chip Example

Consider a general purpose high Q multilayer ceramic chip from Murata. Instead of entering its capacitance value of 0.20 pF as an ideal component in XF, a more accurate model can be used in the simulation by following these steps:

  1. Locate the capacitor on Murata's website by searching the part number.
  2. Download a SPICE netlist file (*.mod) from the product page.
  3. Import the netlist file into XF's netlist component definition.
  4. Place the model in the FDTD simulation space as a Circuit Component.

At each timestep during the FDTD simulation, co-simulation with a circuit solver will update the cell edge containing the netlist component.